Physical Layer Ethernet Clock Synchronization

Clock synchronization is a service widely used in distributed networks to coordinate data acquisition and actions. As the requirement to achieve tighter synchronization accuracy arose, protocols like the Precision Time Protocol introduced hardware timestamping, shifting the point where the timestamp is drawn from the application layer twards the physical layer. However, the spread of the synchronization service between hardand software increased the complexity of the system and still could not solve the issue with asymmetric transmission delays. In contrast to existing synchronization systems, this paper proposes a layer 1 clock synchronization system based on hierarchical clock distribution via Ethernet and an IEEE 1588-like clock synchronization protocol operating on a separate data channel orthogonal to the Ethernet’s Multilevel Transmission encoding-3 (MLT-3). All clock synchronizationrelated tasks will be performed by an ASIC attached in parallel to the standard Ethernet PHY. As the ASIC captures the analog data from the line, it is able not only to create nanosecond-accurate timestamps, but also to perform true one-way delay measurements, which are a prerequisite to remove inevitable asymmetry of Ethernet cables. This innovative approach enables one to build lightweight nodes while still achieving unmatched synchronization accuracy.